PIC18F2450/4450
DS39760A-page 136
Advance Information
2006 Microchip Technology Inc.
14.2.5
USB ADDRESS REGISTER
(UADDR)
The USB Address register contains the unique USB
address that the peripheral will decode when active.
UADDR is reset to 00h when a USB Reset is received,
indicated by URSTIF, or when a Reset is received from
the microcontroller. The USB address must be written
by the microcontroller during the USB setup phase
(enumeration) as part of the Microchip USB firmware
support.
14.2.6
USB FRAME NUMBER REGISTERS
(UFRMH:UFRML)
The Frame Number registers contain the 11-bit frame
number. The low-order byte is contained in UFRML,
while the three high-order bits are contained in
UFRMH. The register pair is updated with the current
frame number whenever a SOF token is received. For
the microcontroller, these registers are read-only. The
Frame
Number
register
is
primarily
used
for
isochronous transfers.
14.3
USB RAM
USB data moves between the microcontroller core and
the SIE through a memory space known as the USB
RAM. This is a special dual port memory that is
mapped into the normal data memory space in Bank 4
(400h to 4FFh) for a total of 256 bytes (Figure 14-5).
Some portion of Bank 4 (400h through 4FFh) is used
specifically for endpoint buffer control, while the
remaining portion is available for USB data. Depending
on the type of buffering being used, all but 8 bytes of
Bank 4 may also be available for use as USB buffer
space.
Although USB RAM is available to the microcontroller
as data memory, the sections that are being accessed
by
the
SIE
should
not
be
accessed
by
the
microcontroller. A semaphore mechanism is used to
determine the access to a particular buffer at any given
time. This is discussed in Section 14.4.1.1 “Buffer
FIGURE 14-5:
IMPLEMENTATION OF
USB RAM IN DATA
MEMORY SPACE
400h
4FFh
7FFh
500h
USB Data or
Buffer Descriptors,
USB Data or User Data
User Data
Unused
SFRs
3FFh
000h
F80h
FFFh
Banks 0
Banks 5
Bank15
F00h
800h
to 14
to 1
Bank 4
Banks 2
to 3
Unused
1FFh
200h
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